Photonic Engineer - Design & Layout (Integrated Photonics Unit)

Background of the recruitment and description of the project
We are expanding our team to further accelerate the R&D of optical quantum computers toward practical application.

Work content and job description
In this role, you will be responsible for the design, simulation, and optimization of the integrated photonic components that form the building blocks of our photonic integrated circuits (PICs) for optical quantum computing.
Your core focus will be translating device-level performance targets into robust, foundry-ready designs. This includes electromagnetic and multiphysics modelling, design optimization, layout generation, and close iteration with measurement results across tape-out cycles.

• Component Design & Simulation: Design and model photonic components such as waveguides, directional and adiabatic couplers, MMIs, interferometers, ring resonators, and edge/grating couplers using FDTD, FEM, and multiphysics (e.g., thermo-optic, electro-optic) solvers.
• Optimization & Automation: Build simulation and optimization workflows, including inverse design and machine-learning-assisted approaches, to improve loss, bandwidth, footprint, and fabrication tolerance.
• Layout & Tape-out: Generate PDK-based and scripted (parametric) layouts, run design-rule checks, and prepare submissions to commercial foundries and partner facilities.
• Design–Measurement Feedback: Analyze characterization data with the test team, extract model parameters, and maintain compact models and component libraries for circuit-level design.

Common to all Job Types
Annual Salary :

10 million yen
~
20 million yen

Work experience
[Required Qualifications]

• Hands-on experience with photonic device simulation using FDTD and FEM solvers (e.g., Ansys Lumerical, COMSOL, Tidy3D, or equivalent), including multiphysics modelling (thermal, electro-optic, or mechanical).
• Solid understanding of waveguide theory, mode analysis, and coupled-mode theory, and the ability to apply them to the design of couplers, interferometers, and resonators.
• Proficiency in programming (e.g., Python, MATLAB) for simulation automation, parametric layout, and data analysis.
• Experience applying machine learning or numerical optimization (e.g., inverse design, adjoint methods, Bayesian optimization) to photonic device design.
• Foundational knowledge of photonic integrated circuit platforms (such as Si, SiN, LN, etc.) and PDK-based design flows.
• 2+ years of practical experience in integrated photonic device design (including research during Master’s/Ph.D. programs).
• Project Execution: Ability to independently drive design tasks from specification to tape-out, document designs clearly, and coordinate with fabrication and test colleagues.

[Preferred Qualifications]

• Experience with photonic layout tools (e.g., KLayout, gdsfactory, IPKISS/Luceda, Synopsys) and DRC/LVS flows.
• A track record of taped-out designs that have been fabricated and characterized.
• Experience building ML-based surrogate models or large-scale design-space exploration.
• Hands-on experience with optical characterization of PICs.
• Publications in peer-reviewed journals or conferences.
• Interest in or knowledge of quantum optics or continuous-variable (CV) quantum computing.

Common to all Job Types
Tenured

-

Non-tenure track

Various systems
Transportation expenses :
available (Up to JPY 100,000 per month)

Measures for preventing passive smoking at the workplace
No smoking indoors (Designated smoking room available in the building's common area).

Considerations for conducting interviews (e.g., those who live far away, such as overseas)

• Interviews are generally conducted online; however, candidates will be required to visit our office at least once.
• Please consult with us if this is difficult for you.
• Transportation expenses will be reimbursed for candidates traveling from distant locations (subject to company regulations).
• Reference checks may be requested during the selection process.
• The selection process and the number of interview rounds are subject to change.

Selection
Document Screening → 1st Interview → 2nd Interview → Final Interview → Offer Meeting (Note: The number of interviews may vary.)

Notification of result
We will contact you via email within 14 days of your interview.